A flash memory device is a non-volatile semiconductor memory device, which retains its memory contents even if it is powered off. It offers fast read access time and better shock resistance compared to hard disks. As a result, flash memory devices are popular for applications such as storage on battery-powered devices. Today, flash memory devices are extensively used in consumer electronic products.
A flash memory device stores information in memory cells, each of which traditionally stores one bit of information. More recently, flash memory devices have been developed to store more than 1 bit per cell and are sometimes referred to as multi-level cell devices. This ability to store multiple bits per cell reduces cost and allows the production of higher density flash memory.
In general, there are two ways to gain higher density for flash memory cells. One way is to achieve multi-level operation and control mainly by circuit design consideration such as in stacked gate flash memory. Another way is to enable storage of multiple states in a cell by using nitride storage material, resulting in devices such as Nitride Read Only Memory (NROM), Silicon Oxide Nitride Oxide Silicon (SONOS), and Twin Metal Oxide Nitride Oxide Semiconductor (TwinMONOS).
FIG. 1 illustrates a cross-sectional view of a conventional nitride read only memory (NROM) cell. The NROM cell includes a p-type substrate 150 having formed therein an n+-type source region 160 and an n+-type drain region 170, and a control gate 180. A silicon nitride layer 182 is sandwiched between two oxide layers 184 and 186. A channel 188 is formed under the oxide layer 184 and between the source region 160 and the drain region 170. The NROM cell can be programmed to store two physically separated bits 192 and 194.
Programming of the NROM can be performed by Channel Hot Electron (CHE) injection, which generates hot electrons in the channel 188. Some of these hot electrons gain enough energy to travel through the oxide layer 184 and become trapped in the silicon nitride layer 182. By interchanging the role of the source and drain terminals, the trapped charge will move to the region in the silicon nitride layer 182 near the source region 160 or near the drain region 170. The localized trapped charge near the source region 160 represents bit 192, while the localized trapped charge near the drain region 170 represents bit 194. Therefore, a nitride storage memory cell such as a NROM cell can have a density of 2 bits/cell.
Further, more recently, there have been developed structures and techniques for multi-level storage at each storage location in the nitride layer of storage devices containing an oxide-nitride-oxide (ONO) structure, such as any of the above listed NROM, SONOS and TwinMONOS devices. As a result, for example, each bit 192 or 194 of the NROM shown in FIG. 1 could be programmed to represent one of multiple program states.
In order to read data stored in the conventional 1 bit/cell flash memory device, the presence or absence of current is sensed and translated into 1's and 0's, representing the stored data. In order to read data stored in a multi-level cell device, an amount of current flow or a distinct threshold voltage range may be sensed, rather than simply detecting the presence or absence of current. Each distinct threshold voltage range represents a distinct program state. For example, in a 2 bits/cell memory cell, a first threshold voltage range covering voltages less than 3.0 V may represent a program state 00 (or program level 0), a second threshold voltage range covering voltages from 3.25 V to 3.75 V may represent a program state 01 (or program level 1), a third threshold voltage range covering voltages from 4.25 V to 4.75 V may represent a program state 10 (or program level 2), and a fourth threshold voltage range covering voltages greater than 5.0 V may represent a program state 11 (or program level 3).